https://www.varnish-cache.org/trac/wiki/ArchitectNotes
Varnish allocate some virtual memory, it tells the operating system to back this memory with space from a disk file. When it needs to send the object to a client, it simply refers to that piece of virtual memory and leaves the rest to the kernel.
If/when the kernel decides it needs to use RAM for something else, the page will get written to the backing file and the RAM page reused elsewhere.
When Varnish next time refers to the virtual memory, the operating system will find a RAM page, possibly freeing one, and read the contents in from the backing file.
More caches.
But there are more caches around, the silicon mafia has more or less stalled at 4GHz CPU clock and to get even that far they have had to put level 1, 2 and sometimes 3 caches between the CPU and the RAM (which is the level 4 cache), there are also things like write buffers, pipeline and page-mode fetches involved, all to make it a tad less slow to pick up something from memory.
And since they have hit the 4GHz limit, but decreasing silicon feature sizes give them more and more transistors to work with, multi-cpu designs have become the fancy of the world, despite the fact that they suck as a programming model.
https://en.wikipedia.org/wiki/CPU_cache
A CPU cache is a cache used by the central processing unit (CPU) of a computer to reduce the average time to access data from the main memory. The cache is a smaller, faster memory which stores copies of the data from frequently used main memory locations. Most CPUs have different independent caches, including instruction and data caches, where the data cache is usually organized as a hierarchy of more cache levels (L1, L2, etc.)
Multi-level caches
To address this tradeoff, many computers use multiple levels of cache, with small fast caches backed up by larger, slower caches. Multi-level caches generally operate by checking the fastest, level 1 (L1) cache first; if it hits, the processor proceeds at high speed. If that smaller cache misses, the next fastest cache (level 2, L2) is checked, and so on, before external memory is checked.
https://www.quora.com/What-is-the-L1-L2-L3-cache-of-a-microprocessor-and-how-does-it-affect-the-performance-of-it
(L1) Level 1 Cache(2KB - 64KB) - Instructions are first searched in this cache. L1 cache very small in comparison to others, thus making it faster than the rest.
(L2) Level 2 Cache(256KB - 512KB) - If the instructions are not present in the L1 cache then it looks in the L2 cache, which is a slightly larger pool of cache, thus accompanied by some latency.
(L3) Level 3 Cache (1MB -8MB) - With each cache miss, it proceeds to the next level cache. This is the largest among the all the cache, even though it is slower, its still faster than the RAM.
128MB L4 cache
The L4 cache acts a victim cache for the L3, meaning that any information evicted from L3 is promptly dumped into L4. The cache is clocked at 1.6GHz — roughly half the clock speed of the CPU.
cpu 4 ghz limit
http://electronics.stackexchange.com/questions/122050/what-limits-cpu-speed
Practically, what limits CPU speed is both the heat generated and the gate delays, but usually, the heat becomes a far greater issue before the latter kicks in.
Recent processors are manufactured using CMOS technology. Every time there is a clock cycle, power is dissipated. Therefore, higher processor speeds means more heat dissipation.
http://en.wikipedia.org/wiki/CMOS
Complementary metal–oxide–semiconductor (CMOS) 互补金属氧化物半导体
You can really see how the CPU transition power increases (exponentially!).
Clock Rate
The clock rate typically refers to the frequency at which a chip like a central processing unit (CPU), one core of a multi-core processor, is running and is used as an indicator of the processor's speed. It is measured in the SI unit hertz. The clock rate of the first generation of computers was measured in hertz or kilohertz, but in the 21st century the speed of modern CPUs is commonly advertised in gigahertz. This metric is most useful when comparing processors within the same family, holding constant other features that may impact performance.
时钟频率（是指同步电路中时钟的基础频率，它以“若干次周期每秒”来度量，量度单位采用SI单位赫兹（Hz）。例如，来自晶振的基准频率通常等于一个固定的正弦波形，则时钟频率就是这个基准频率，电子电路会为数字电子设备将它转化成对应的脉冲方波。需要补充一点的是，“速度”作为矢量不应与标量“频率”相混淆，所以使用“时钟速度”来描述这个概念是用词不当的。
Varnish allocate some virtual memory, it tells the operating system to back this memory with space from a disk file. When it needs to send the object to a client, it simply refers to that piece of virtual memory and leaves the rest to the kernel.
If/when the kernel decides it needs to use RAM for something else, the page will get written to the backing file and the RAM page reused elsewhere.
When Varnish next time refers to the virtual memory, the operating system will find a RAM page, possibly freeing one, and read the contents in from the backing file.
More caches.
But there are more caches around, the silicon mafia has more or less stalled at 4GHz CPU clock and to get even that far they have had to put level 1, 2 and sometimes 3 caches between the CPU and the RAM (which is the level 4 cache), there are also things like write buffers, pipeline and page-mode fetches involved, all to make it a tad less slow to pick up something from memory.
And since they have hit the 4GHz limit, but decreasing silicon feature sizes give them more and more transistors to work with, multi-cpu designs have become the fancy of the world, despite the fact that they suck as a programming model.
https://en.wikipedia.org/wiki/CPU_cache
A CPU cache is a cache used by the central processing unit (CPU) of a computer to reduce the average time to access data from the main memory. The cache is a smaller, faster memory which stores copies of the data from frequently used main memory locations. Most CPUs have different independent caches, including instruction and data caches, where the data cache is usually organized as a hierarchy of more cache levels (L1, L2, etc.)
Multi-level caches
To address this tradeoff, many computers use multiple levels of cache, with small fast caches backed up by larger, slower caches. Multi-level caches generally operate by checking the fastest, level 1 (L1) cache first; if it hits, the processor proceeds at high speed. If that smaller cache misses, the next fastest cache (level 2, L2) is checked, and so on, before external memory is checked.
https://www.quora.com/What-is-the-L1-L2-L3-cache-of-a-microprocessor-and-how-does-it-affect-the-performance-of-it
(L1) Level 1 Cache(2KB - 64KB) - Instructions are first searched in this cache. L1 cache very small in comparison to others, thus making it faster than the rest.
(L2) Level 2 Cache(256KB - 512KB) - If the instructions are not present in the L1 cache then it looks in the L2 cache, which is a slightly larger pool of cache, thus accompanied by some latency.
(L3) Level 3 Cache (1MB -8MB) - With each cache miss, it proceeds to the next level cache. This is the largest among the all the cache, even though it is slower, its still faster than the RAM.
128MB L4 cache
The L4 cache acts a victim cache for the L3, meaning that any information evicted from L3 is promptly dumped into L4. The cache is clocked at 1.6GHz — roughly half the clock speed of the CPU.
cpu 4 ghz limit
http://electronics.stackexchange.com/questions/122050/what-limits-cpu-speed
Practically, what limits CPU speed is both the heat generated and the gate delays, but usually, the heat becomes a far greater issue before the latter kicks in.
Recent processors are manufactured using CMOS technology. Every time there is a clock cycle, power is dissipated. Therefore, higher processor speeds means more heat dissipation.
http://en.wikipedia.org/wiki/CMOS
Complementary metal–oxide–semiconductor (CMOS) 互补金属氧化物半导体
You can really see how the CPU transition power increases (exponentially!).
Clock Rate
The clock rate typically refers to the frequency at which a chip like a central processing unit (CPU), one core of a multi-core processor, is running and is used as an indicator of the processor's speed. It is measured in the SI unit hertz. The clock rate of the first generation of computers was measured in hertz or kilohertz, but in the 21st century the speed of modern CPUs is commonly advertised in gigahertz. This metric is most useful when comparing processors within the same family, holding constant other features that may impact performance.
时钟频率（是指同步电路中时钟的基础频率，它以“若干次周期每秒”来度量，量度单位采用SI单位赫兹（Hz）。例如，来自晶振的基准频率通常等于一个固定的正弦波形，则时钟频率就是这个基准频率，电子电路会为数字电子设备将它转化成对应的脉冲方波。需要补充一点的是，“速度”作为矢量不应与标量“频率”相混淆，所以使用“时钟速度”来描述这个概念是用词不当的。
